1. Field of the Invention
The present invention relates generally to sigma-delta modulators. More particularly, the present invention relates to methods of cascading sigma-delta modulators.
2. Description of Related Art
As discussed in greater detail in the related applications, high-order sigma-delta modulators have recently become increasingly interesting in audio and ISDN applications. In part, this is because the introduction of high-order modulators in audio and ISDN equipment and apparatus increases the number of integrations to be carried out, which results in a decrease in the noise level of the passband, with the quantization noise shifted to a higher frequency level. This technique, often referred to as "quantization noise shaping through integration", provides an improved signal-to-noise ratio and improved precision.
Karema et al., in U.S. Pat. No. 5,061,928, have introduced a fourth-order topology which comprises a cascade of two second-order modulators. This is shown in FIG. 1 wherein the two second-order modulators are each generally designated with reference numeral 10. As shown therein, a gain of 1/C (in the form of gain element 12) has been added between the two modulators in order to prevent overflow of the second modulator. As in certain other prior art modulators discussed in greater detail in the related applications, a digital circuit is added to Karema et al.'s cascade. This circuit, generally designated by reference numeral 14, is set forth at the bottom of FIG. 1. This circuit combines the quantized outputs of the two second-order sections y.sub.1, y.sub.2 in such a manner that the quantization error of the second modulator receives fourth-order shaping. Algebraically, if the input to the converter is given as x and the quantization error of the second modulator is given as E.sub.2, the output y can be expressed as: EQU y=z.sup.-4 x+C(1-z.sup.-1).sup.4 E.sub.2.
In pending U.S. patent application Ser. No. 08/112,610, the inventor of the present invention teaches a system and method for cascading three sigma-delta modulators. This system and method involves applying an error signal representing the quantization error of a preceding modulator to a subsequent modulator. The error signal is scaled by a factor before being applied to a subsequent modulator. The quantized error signal of the subsequent modulator is then scaled by the reciprocal of the original scaling factor before being combined with the quantized outputs of the previous modulators. Combining the quantized outputs of the three modulators is performed so as to cancel the quantization error of the previous stages while shaping the noise at the last stage so that most of the noise is placed at high frequencies.
In pending U.S. patent application Ser. No. 08/147,062, the inventor of the present invention improved upon the system and method discussed in the immediately preceding paragraph. This improved system and method involves feeding the input of the quantizer of each stage to the subsequent stage. A difference between the output of each quantizer and the input of each quantizer need not be obtained. The signal which is fed to each of the subsequent stages is the difference between the output of the previous stage and the quantization noise of the previous stage. A correction network which removes both the quantization noise of the first two stages, as well as the output of the first two stages, is included. The final output of modulators so cascaded is a delayed version of the input thereto, plus a scaled version of the last stage which has been shaped with a fourth-order high pass function.
Based upon the foregoing, it should be understood and appreciated that fourth-order sigma-delta modulators have important advantages over lesser order modulators in certain applications. Further on this point, the signal-to-noise ratio (SNR) of ideal sigma-delta modulators is given by the following equation: EQU SNR=(2L+1) 10 log (OSR) log (.pi..sup.2L /2L+1)
where OSR is the oversampling ratio and L is the order of the modulator. For example, if L=3 and the OSR=64, the SNR equals 105 dB. If L=4 and the OSR=64, the SNR equals 132.3 dB. Thus, a fourth-order loop has more inherent margin for 16-bit performance that does a third-order loop with the same oversampling ratio.
Although fourth-order sigma-delta modulators, such as those discussed above, have heretofore been proposed, it is a shortcoming and deficiency of the prior art that there are not additional types of such modulators to use.